To ensure stability, V FB must fall monotonically during the off-time in-phase with the inductor current. In many applications, the ripple at the FB is derived from the output voltage ripple. The nature of the output voltage ripple can be divided in two components:. As the V C lags the inductor current, it does not fall monotonically during the off-time.
The V ESR is in-phase with the inductor current and falls monotonically during the off-time. For the converter to switch consistently, the resistive component of the ripple must exceed the capacitive ripple component during the off-time:. In addition to the relative values of ripple at the FB, the ripple magnitude itself is important.
If it is too small, it will be insufficient to trip the feedback comparator. This also results in an unstable switching pattern. In practice, a peak-to-peak ripple amplitude of 25 mV is recommended at the feedback comparator input:. Figure 4 shows the behavior of a constant-on-time buck converter with and without sufficient resistance in series with the output capacitor.
Using a resistance in series with the output capacitor as shown in Figure 5 is the easiest method of ensuring ripple at the FB. The ripple is generated at the output node as the inductor ripple current flows through the series resistor, and then it is coupled to the FB by the feedback resistor divider.
For the circuit shown in Figure 5 , the output voltage ripple is four times the feedback node ripple.
For applications requiring lower output voltage ripple, the output voltage ripple can be AC-coupled to the FB using a small capacitor Figure 6. In this case the ripple at the feedback and output nodes are similar. The required ripple resistor magnitude has also decreased accordingly. In some applications, the power supply designer does not have complete control over the output filter capacitor network. One example is when the DC-DC converter 3 in consideration has a load with input bypass capacitors.
The extra capacitors suppress the ripple at the output node Figure 7. Another example is when the output ripple requirements are very stringent because the load is sensitive to noise. For applications where is it not practical or acceptable to add a series resistor, the inductor current ripple can be emulated and injected directly at the FB Figure 8 using an external ripple injection circuit.
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The operation of the external ripple injection circuit is explained in Figure 9. The resistor R r and the capacitor C r form a low-pass filter that converts the rectangular SW node waveform to a triangular waveform at the ripple node A1. The output node V OUT does not need to have any ripple present in this configuration, which allows independent optimization of the output filter network to meet the load ripple and transient requirements unconstrained by converter stability concerns.
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Table 1 summarizes three ripple schemes along with working equations to calculate the ripple component values. The ripple at the FB affects the line regulation. For the three ripple schemes described in the previous section, the actual output voltage is slightly higher than the set point decided by the feedback resistor divider, because only the valley of the FB is regulated to the reference voltage V REF Figure It depends on the input voltage and results in line regulation component related to the injected ripple.
It is desirable to keep the injected ripple magnitude as low as possible to limit the line related variation in the output voltage. The effect of ripple on the line regulation is shown in Figure We may ship the books from Asian regions for inventory purpose Edition: U. Book Description Condition: New. US edition.
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From the Publisher : If you are a working engineer responsible for designing VFCs, or selecting IC converters, the variety of circuit configurations described here should simplify your task. About the Author : An established writer of international best-sellers in the field of electronics, Mr.
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